Field of the Invention
The present invention relates to a semiconductor package assembly, and in particular to a semiconductor package assembly including a fan-out wafer-level semiconductor package (FOWLP) with a high bandwidth memory (HBM) package.
Description of the Related Art
Package-on-package (PoP) package assembly is an integrated circuit packaging method that combines vertically discrete system-on-chips (SOC) and memory packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants (PDAs), and digital cameras.
For memory applications with increased levels of integration as well as improved performance, bandwidth, latency, power, weight, and form factor, the signal pad to ground pad ratio becomes important in improving the coupling effect.
Thus, a novel semiconductor package assembly is desirable.